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september 2013 ? 2013 fairchild semiconductor corporation www.fairchildsemi.com fan48610 ? rev. 1.0.0 fan48610 ? 2.5 mhz, fixed - output synchronous tinyboost? regulator fan48610 2.5 mhz, fixed - output synchronous tinyboost? regulator features ? input voltage range: 2.35 v to 5.50 v ? output voltages r ange: 3 .0 v to 5 .0 v ? i out 1 a at v out = 5.0 v, v in 2.5 v ? i out 1.5 a at v out = 5.0 v, v in 3.0 v ? up to 94% efficient ? automatic pass - through operation when v in > v out ? internal synchronous rectification ? soft - start with true load disconnect ? short - circuit protection ? 9 - bump, 1.215 mm x 1.215 mm, 0.4 mm pitch wlcsp ? three external components: 2016 0.47 h inductor, 0603 case size input / output capacitors ? total application b oard s olution s ize : < 11 mm 2 applications ? class - d audio amplifier and usb otg supply ? boost for low - voltage li - ion batteries ? smart phones, tablets, portable d evices description the fan48610 is a low - power boost regulator designed to provide a minimum voltage - regulated rail from a standard single - cell li - ion battery and a dvanced battery chemistries. even below the minimum s ystem battery voltage , the device maintain s the output voltage regulation for a minimum output load current of 1.0 a. the combination of built - in power transistors, synchronous rectification, and low sup ply current suit the fan48610 for battery - powered applications. the fan48610 is available in a 9 - bump, 0.4 mm pitch, wafer - level chip- scale package (wlcsp). figure 1. typical application ordering information part number v out operating temp package packing (1) fan48610uc50x 5.0 v - 40c to 85c wlcsp, 0.4 mm pitch tape and reel FAN48610BUC50X ( 2 ) 5.0 v - 40c to 85c wlcsp, 0.4 mm pitch tape and reel note s : 1. please refer to application note an - 6054 ? tape and reel specifications on www.fairchildsemi.com . 2. the fan48610buc50 x includes backside lamination. fan48610 vout pgnd c out l1 0.47h 22f vin sw en c in + battery system load agnd 10f
? 2013 fairchild semiconductor corporation www.fairchildsemi.com fan48610 ? rev. 1.0.0 ? 2 fan48610 ? 2.5 mhz , fixed - output synchronous tinyboost? regulator block diagrams q2 q2b q2a en l1 c out vout q1 modulator logic and control vin sw c in synchronous rectifier control pgnd agnd figure 2. ic block diagram table 1. recommended components component description vendor parameter typ. unit l1 0.47 h, 3 0% , 2016 toko: dfe201612c dfr201612c cyntec: pife20161b l 0.47 h dcr (series r) 4 0 m ? c in 10 f, 10%, 6.3 v, x5r, 0603 murata: grm188r60j 106 k tdk: c1608x5r0j 106k c 10 f c out 22 f, 20%, 6.3 v, x5r, 0603 tdk: c1608x5r 0j226m c 22 f pin configuration figure 3. top view figure 4. bottom view pin definitions pin # name description a1, a2 vout output voltage . this pin is the output voltage terminal ; connect directly to c out . a3 vin input voltage . connect to li - ion battery input power source and the bias supply for the gate drivers. b1, b2 sw switching node . connect to inductor . b3 en enable . when this pin is high , the circuit is enabled. c1, c2 pgnd power ground . this is the power return for the ic. c out capacitor should be returned with the shortest path possible to these pins. c3 agnd analog ground . this is the signal ground reference for the ic. all voltage levels are measured with respect t o this pin ? connect to pgnd at a single point. vout en sw b1 b2 pgnd c1 c2 a1 a2 vin agnd b3 a3 c3 b3 b2 c3 c2 a3 a2 b1 a1 c1
? 2013 fairchild semiconductor corporation www.fairchildsemi.com fan48610 ? rev. 1.0.0 ? 3 fan48610 ? 2.5 mhz , fixed - output synchronous tinyboost? regulator absolute maximum ratings stresses exceeding the absolute maximum ratings may damage the device. the device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. in addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. the absolute maximum ratings are stress ratings only. symbol parameter min. max. unit v in voltage on vin pin - 0.3 6.0 v v out voltage on vout pin 6.0 v sw sw n ode dc - 0.3 6 .0 v transient: 10 ns, 3 m h z -1 .0 8.0 voltage on other p ins - 0.3 6.0 ( 3 ) v esd electrostatic discharge protection level human body model per jesd22 - a114 5 kv charged device model per jesd22 - c101 2 t j junction temperature -40 +150 c t stg storage temperature -65 +150 c t l lead soldering temperature, 10 seconds +260 c note: 3. lesser of 6.0 v or v in + 0.3 v. recommended operating conditions the recommended operating conditions table defines the conditions for actual device operation. recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. fairchild does not recommend exceeding them or designing to absolute maximum ratings. symbol parameter min. max. unit v in supply voltage 2. 5 4.5 v i out maximum output current 1000 ma t a ambient temperature -40 +85 c t j junction temperature -40 +125 c thermal properties junction -to - ambient thermal resistance is a function of application and board layout. this data is measured with four - layer 2 s2p boards with vias in accordance to jedec standard jesd51. special attention must be paid not to exceed junction temperature , t j(max) , at a given ambient temperat ure, t a . symbol parameter typical unit ? ja junction -to - ambient thermal resistance 5 0 c/w
? 2013 fairchild semiconductor corporation www.fairchildsemi.com fan48610 ? rev. 1.0.0 ? 4 fan48610 ? 2.5 mhz , fixed - output synchronous tinyboost? regulator electrical specifications recommended operating conditions, unless otherwise noted, circuit per figure 1 , v out = 3.0 v to 5.0 v, v in = 2. 5 v to 4. 5 v, t a = -40 ?c to 85?c . typical values are given v in = 3.6 v and t a = 25 ?c. symbol parameter conditions min. typ. max. units power supply i q v in q uiescent c urrent v in =3.6 v, i out =0, en= v in 85 125 a shutdown: en=0, v in =3.6 v 3 10 v uvlo under -v oltage lockout v in r ising 2.2 2.3 v v uvlo_hys under - voltage lockout h ysteresis 150 mv inputs v ih enable high voltage 1. 05 v v il enable low voltage 0.4 v i pd current sink pull - down en pin , logic high 100 na r low low - state active pull - down en pin , logic low 200 300 400 k ou t puts v reg output v oltage a ccuracy dc ( 4 ) referred to v out -2 4 % i lk_out vin -to -v out l eakage c urrent v out =0, en=0, v in =4.2 v 1 a i lk v out -to -vin r everse l eakage current v out =5 .0 v, en=0 , v in =2.5v 3.5 a v trsp output voltage accuracy transient ( 5 ) referred to v out , 50 - 500 ma load step -5 5 % timing f sw switching frequency v in =3.6 v, v out =5.0 v, load=1000 ma 2.0 2.5 3.0 mhz t ss soft - start en high to regulation 50 ? load , v out = 5.0 v 600 s t rst fault restart timer 20 ms power stage r ds(on)n n - channel b oost s witch r ds(on) v in =3.6 v, v out = 5 .0 v 8 0 130 m r ds(on)p p- channel sync. rectifier r ds(on) v in =3.6 v, v out = 5 .0 v 65 115 m i v_lim boost v alley c urrent l imit v out =5 .0 v 3. 0 a i v_lim_ss boost soft -s tart v alley c urrent l imit v in 3 f. 5. guaranteed by design and characterization ; not tested in production.
? 2013 fairchild semiconductor corporation www.fairchildsemi.com fan48610 ? rev. 1.0.0 ? 5 fan48610 ? 2.5 mhz , fixed - output synchronous tinyboost? regulator typical characteristics unless otherwise specified; v in = 3.6 v, v out = 5 .0 v, t a = 25c , and circuit and components according to figure 1 . figure 5. efficiency vs. load current and input voltage, v out =3.5 v figure 6. efficiency vs. l oad current and temperature, v in =3.0 v, v out =3.5 v figure 7. efficiency vs. load current and input voltage figure 8. efficiency vs. load current and temperature figure 9. efficiency vs. input voltage and output voltage, 200 ma l oad figure 10. efficiency vs. input voltage and output voltage, 1000 ma load 80% 84% 88% 92% 96% 100% 1 10 100 1000 efficiency load current (ma) 2.6 vin 3.0 vin 3.3 vin 4.2 vin 80% 84% 88% 92% 96% 100% 1 10 100 1000 efficiency load current (ma) - 40c +25c +85c 76% 80% 84% 88% 92% 96% 1 10 100 1000 efficiency load current (ma) 2.6 vin 3.0 vin 3.6 vin 4.2 vin 76% 80% 84% 88% 92% 96% 1 10 100 1000 efficiency load current (ma) - 40c +25c +85c 80% 84% 88% 92% 96% 100% 2.0 2.5 3.0 3.5 4.0 4.5 efficiency input voltage (v) 5.0 vout 3.5 vout 78% 82% 86% 90% 94% 98% 2.0 2.5 3.0 3.5 4.0 4.5 efficiency input voltage (v) 5.0 vout 3.5 vout
? 2013 fairchild semiconductor corporation www.fairchildsemi.com fan48610 ? rev. 1.0.0 ? 6 fan48610 ? 2.5 mhz , fixed - output synchronous tinyboost? regulator typical characteristics unless otherwise specified; v in = 3.6 v, v out = 5 .0 v, t a = 25c , and circuit and components according to figure 1 . figure 11. output regulation vs. load current and input voltage (normalized to 3.6 v in , 500 ma load) figure 12. output regulation vs. load current and temperature (normalized to 3.6 v in , 500 ma load, t a =25c) figure 13. quiescent current vs. input voltage, temperatur e , v out =5.0 v figure 14. quiescent current vs. inp ut voltage, temperature , v out =3.5 v figure 15. output ripple vs. load current and input voltage figure 16. frequency vs. load current and input voltag e - 2 - 1 0 1 2 3 0 250 500 750 1000 output regulation (%) load current (ma) 2.6 vin 3.0 vin 3.6 vin 4.2 vin - 2 - 1 0 1 2 0 250 500 750 1000 output regulation (%) load current (ma) - 40c +25c +85c 0 20 40 60 80 100 120 2.0 2.5 3.0 3.5 4.0 4.5 input current ( a) input voltage (v) - 40c auto +25c auto +85c auto 0 20 40 60 80 100 120 2.0 2.5 3.0 3.5 4.0 4.5 input current ( a) input voltage (v) - 40c auto +25c auto +85c auto 0 10 20 30 40 50 60 0 250 500 750 1000 output ripple (mvpp) load current (ma) 2.6 vin 3.0 vin 3.6 vin 4.2 vin 0 500 1,000 1,500 2,000 2,500 3,000 0 250 500 750 1000 switching frequency (khz) load current (ma) 2.6 vin 3.0 vin 3.6 vin 4.2 vin
? 2013 fairchild semiconductor corporation www.fairchildsemi.com fan48610 ? rev. 1.0.0 ? 7 fan48610 ? 2.5 mhz , fixed - output synchronous tinyboost? regulator typical characteristics unless otherwise specified; v in = 3.6 v, v out = 5 .0 v, t a = 25c , and circuit and components according to figure 1 . figure 17. startup, 50 ? load figure 18. startup, 50 ? load, v in =2.6 v, v out =3.5 v figure 19. overload protection figure 20. load transient, 100 -500 ma, 100 ns edge figure 21. load transient, 500 - 1000 ma, 100 ns edge figure 22. simultaneous line / load transient, 3.3 - 3.9 v in , 10 s edge, 500 - 1000 ma load, 100 ns edge
? 2013 fairchild semiconductor corporation www.fairchildsemi.com fan48610 ? rev. 1.0.0 ? 8 fan48610 ? 2.5 mhz , fixed - output synchronous tinyboost? regulator typical characteristics unless otherwise specified; v in = 3.6 v, v out = 5 .0 v, t a = 25c , and circuit and components according to figure 1 . figure 23. load transient, 100 -500 ma, 100 ns edge, v in =3 v, v out =3.5 v figure 24. load transient, 500 - 1000 ma, 100 ns edge, v in =3 v, v out =3.5 v figure 25. line transient, 3.0 - 3.6 v in , 10 s edge, 500 ma load, v out =3.5 v figure 26. line transient, 3.3 - 3.9 v in , 10 s edge, 500 ma load, v out =5.0 v figure 27. pass - through entry / exit, 3.2 - 3.8 v in , 1 ms ramp, 500 ma load, v out =3.5 v figure 28. typical maximum output current vs. input voltage 0.60 1.00 1.40 1.80 2.20 2.60 2.5 3.0 3.5 4.0 4.5 maximum output current (a) input voltage (v) +25c +85c
? 2013 fairchild semiconductor corporation www.fairchildsemi.com fan48610 ? rev. 1.0.0 ? 9 fan48610 ? 2.5 mhz , fixed - output synchronous tinyboost? regulator circuit description fan 48610 is a synchronous boost reg ulator, typically operating at 2.5 mhz in c ontinuous c onduction m ode (ccm), which occurs at moderate to heavy load current and low v in voltages. the regulator ?s pass -t hrough m ode automatically activates when v in is above the boost regulator?s set point . table 2. operating modes mode description invoked when: lin linear startup v in > v out ss boost soft - start v in < v out < v out(target) bst boost operating mode v out = v out (target) pt pass -t hrough mode v in > v out (target) boost mode regulation the fan 48610 uses a current - mode modulator to achieve excellent transient response and smooth transitions between ccm and dcm operation. during ccm operation, the device maintains a switching frequency of about 2.5 m h z. in light - load operation (dcm), frequency is naturally reduced to maintain high ef ficiency. shutdown and startup when en is low , all bias circuits are off and the regulator is in s hutdown m ode. during shutdown, current flow is prevented from vin to vou t , as well as reverse flow from vout to vin . i t is recommended to keep load current dra w below 500 ma until the devices successfully executes startup . the following table describes the startup sequence. table 3. boost startup s equence start mode entry exit end mode timeout (s) lin1 v in > v uvlo , en=1 v out > v in - 300 mv ss timeout lin2 512 lin2 lin1 exit v out > v in - 300 mv ss timeout fault 1024 ss lin1 or lin2 exit v out =v out (targ et) bst overload timeout fault 64 lin mode when en is high and v in > v uvlo , the regulator first attempts to bring v out within 300 m v of v in by using the internal fixed - current source from vin (q 2 ). th e current is limited to the lin1 set point . if v out reaches v in - 300 m v during lin1 mode , the ss mode is initiated . o therwise, lin1 times out after 512 s and lin2 mode is entered. in lin2 mode , the curr ent source is incremented to 1.6 a . if v out fails to reach v in -300 m v after 1024 s , a fault condition is declared and the device waits 20 ms to attempt an automatic restart . soft - start ( ss) mode upon the successful completion of lin mode (v out > v in - 300 m v), the regulator begins switching with boost pulses current limited to 50% of nominal level . during ss mode , i f v out fails to reach regulation during the ss ramp sequence for more than 64 s , a fault is declared. if large c out is used , the reference is automatically stepped slower to avoid excessive input current draw. boost (bst) mode this is a normal operati ng mode of the regulator. pass - through ( pt ) mode in normal operation, the device automatically transitions from boost mode to pass - through mode if v in goes above the target v out . in pass - through mode, the devi ce fully enhances q2 to provide a very low impedance path from vin to vout . entry to the pass - through mode is triggered by condition where v in > v out and no switching has occurred during the past 5 s. to soften the entry in to pass - through mode, q2 is driven as a linea r current source for the first 5 s . pass - through mode exit is triggered when v out reaches the target v out voltage. during automatic pass - through mode, the device is short - circuit protected by a voltage comparator tracking the voltage drop from v in to v out ; if the drop exceeds 3 00 mv, a fault is declared. fault state the regulator enters f ault s tate under any of the following conditions: ? v out fails to achieve the voltage required to advance from lin mode to ss mode . ? v out fails to achieve the voltage required to advance from ss mode to bst mode . ? boost current limit triggers for 2 ms during bst mode . ? v in ? v out > 3 00 mv ; this fault can occu r only after successful comple tion of the soft - start sequence. ? v in < v uvlo . once a fa ult is triggered, the regulator stops switching and presents a high - impedance path between vin and vout . after waiting 20 ms, a n automatic restart is attempted. over - t emperature the regulator shut s down if the die temperature exceeds 150c. restart occur s when the ic has cooled by approximately 2 0c.
? 2013 fairchild semiconductor corporation www.fairchildsemi.com fan48610 ? rev. 1.0.0 ? 10 fan48610 ? 2.5 mhz , fixed - output synchronous tinyboost? regulator application information output capacitance (c out ) the effective capacitance (c e f f ( 6 ) ) of small, high - value ceramic capacitors decreases as their bias voltage increases , as illustrated in the graph below: figure 29. c eff for 22 f, 0603, x5r, 6.3 v- rated c apacitor ( tdk c1608x5r 0j226m ) fan48610 is guaranteed for stable operation with the minimum value of c eff (c eff(min ) ) outlined in table 4 . table 4. minimum c eff required fo r stability operating conditions c eff(min) ( f) v out (v) v in (v) i load ( m a ) 5 .0 2. 5 to 4.5 0 to 1000 3.0 note: 6. c eff varies by manufacturer, capacitor material , and case size. inductor s election recommended nominal inductance value is 0.47 h. the fan48610 employs valley - current limiting , so peak inductor current can reach 3. 8 a for a short duration during overload conditions. saturation effects cause the inductor current ripple to become higher under high loading , as only the valley of the ind uctor current ripple is controlled. startup input current limiting is in effect during soft - start, which limits the current available to charge c out and any additional capacitance on the v out line. if the output fails to achieve regulation within the limit s described in the s oft -s tart section above, a fault occurs, causing the circuit to shut down . it wait s a bout 20 ms before attempting a restart. if the total combined output capacitance is very high, the circuit may not start on the first attempt, but eventually achieve s regulation if no load is present. if a high current load and high capacitance are both present during soft - start, the circuit may fail to achieve regulation and continually attempt soft - start, only to have the output capacitance dischar ged by the load when in fault s tate. output voltage ripple output voltage ripple is inversely proportional to c out . during t on , when the boost switch is on, all load current is supplied by c out . out ) ( c i t v load on p p ripple ? = ? and eq. 1 ? ? ? ? ? ? ? ? ? ? = ? = out in sw sw on v v t d t t 1 t herefore : eq. 2 out ) ( 1 c i v v t v load out in sw p p ripple ? ? ? ? ? ? ? ? ? ? ? = ? eq. 3 sw sw f t 1 = eq. 4 t he maximum v ripple occurs when v in is minimum and i load is maximum. for better ripple performance , more output capacitance can be added. layout recommendations the layout recommendations below highlight various top - copper p ours by using different colors. to minimize spikes at vout , c out must be placed as close as possible to pgnd and vout , as shown below. for thermal reasons , it is suggested to maximize t he pour area for all planes other than sw. especially the ground pour should be set to fill all available pcb surface area and tied to internal layers with a cluster of thermal vias. figure 30. layout recommendation 0 5 10 15 20 25 0 1 2 3 4 5 6 capacitance ( f) dc bias voltage (v)
? 2013 fairchild semiconductor corporation www.fairchildsemi.com fan48610 ? rev. 1.0.0 ? 11 fan48610 ? 2.5 mhz , fixed - output synchronous tinyboost? regulator physical dimensions figure 31. 9 - bump, 0.4 mm pitch, wlcsp package package drawings are provided as a service to customers considering fairchild components. drawings may change in any manner w ithout notice. please note the revision and/or date on the drawing and contact a fairchild semiconductor repr esentative to verify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and conditions, specifically t he warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/dwg/uc/uc009ak.pdf product - specific dimensions product d e x y fan48610uc 50 x 1.2 1 5 0.030 mm 1.21 5 0.030 mm 0. 0 20 75 mm 0. 0 20 75 mm fan48610 b uc50x 1.21 5 0.030 mm 1.21 5 0.030 mm 0. 0 20 75 mm 0. 0 20 75 mm
? 2013 fairchild semiconductor corporation www.fairchildsemi.com fan48610 ? rev. 1.0.0 ? 12 fan48610 ? 2.5 mhz , fixed - output synchronous tinyboost? regulator
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